2021-07-30 10:12:17


OTP ROM size: 1K * 16 bits.

RAM size: 48 * 8 bits.

Four levels stack buffer

Bi-directional: P0, P1, P5.

Input only: P1.5.

Programmable open-drain: P1.0.

Wakeup: P0, P1 level change trigger

Pull-up resisters: P0, P1, P5.


External Interrupt trigger edge:P0.0 controlled by PEDGE register.

3-Level LVD.

Most of instructions are one cycle only.

All ROM area JMP instruction.

All ROM area CALL address instruction.

All ROM area lookup table function (MOVC)

Three interrupt sources.

Two 8-bit Timer/Counter.

On chip watchdog timer and clock source is internal low clock RC type (16KHz @3V, 32KHz @5V).

External high clock: RC type up to 10 MHz.

External high clock: Crystal type up to 16 MHz.

Internal low clock: RC type 16KHz(3V), 32KHz(5V).